Overview
Researchers from Carnegie Mellon University (CMU) and the University of California, Los Angeles (UCLA) have pioneered a novel approach that leverages large language model (LLM) agents to automatically refactor software for high-level synthesis (HLS). This breakthrough addresses a critical bottleneck in hardware design: the manual and time-consuming process of adapting software code for efficient hardware implementation.
The Challenge: Software-to-Hardware Translation
High-level synthesis enables designers to describe hardware behavior using high-level programming languages (e.g., C/C++) and automatically generate hardware description languages (HDLs) like Verilog or VHDL. However, not all software code is amenable to HLS—especially legacy or unstructured code that lacks hardware-friendly patterns such as explicit pipelining, dataflow optimization, or memory partitioning. Traditionally, refactoring for HLS requires deep domain expertise and significant manual effort.
The Solution: LLM agents for automated refactoring
The CMU-UCLA team developed a system wherein multiple LLM agents collaborate to analyze, transform, and validate software code for HLS compatibility. Key features include:
- Multi-agent architecture: Specialized agents handle different refactoring tasks (e.g., loop unrolling, array partitioning, function inlining).
- Context-aware reasoning: The agents consider the target FPGA architecture and HLS tool constraints (e.g., Xilinx Vitis, Intel oneAPI).
- Iterative validation: Generated code is automatically tested against performance and resource utilization metrics, with agents refining the output until benchmarks are met.
In their experiments, the LLM agents successfully refactored several benchmark applications (e.g., image processing, linear algebra kernels) with performance comparable to expert-written HLS code, while reducing human effort by over 70%.
Relevance to 2026 and Beyond
As hardware design cycles tighten and the demand for domain-specific accelerators grows (driven by AI/ML, 5G/6G, and edge computing), automated software-to-HLS translation becomes increasingly critical. By 2026, the semiconductor industry is expected to adopt such AI-driven methodologies for:
- Rapid prototyping: Shortening the design space exploration phase.
- Legacy code reuse: Refactoring existing software libraries for hardware acceleration.
- Democratizing hardware design: Enabling software engineers to contribute to hardware development without deep RTL knowledge.
Impact and Future Directions
This research marks a significant step toward fully automated hardware design. The team plans to extend the framework to handle more complex codebases and integrate with commercial HLS tools. Ethical considerations around bias and over-reliance on AI in safety-critical systems remain under investigation.
For the latest developments, follow the research groups at CMU's Computer Architecture Lab and UCLA's Embedded & Reconfigurable Computing Lab.
This content has been edited for clarity and completeness. Original research presented at DAC 2025 and published in IEEE Transactions on Computer-Aided Design (TCAD), 2026.